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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13103-6E
Linear IC
6-Channel 8-BIT A/D Converter
MB4053
s DESCRIPTION
The Fujitsu MB4053 is 6-channel, 8-bit, single-slope A/D converter subsystem designed to be used in a microprocessor based data control system. The MB4053 is single monolithic bipolar IC providing a 1 of 8 address decoder, 8-channel analog multiplier, sample and hold, constant current generator, ramp integrator and comparator in a 16-pin package. This A/D converter subsystems are suitable for a wide range of applications. The resolution required by an application can be obtained by arbitarily selecting a suitable integration time. Also zero offset and full-scale error corrections can be made automatically (auto-zero and auto-calibration) to minimize conversion error.
s FEATURES
* * * * * * * * * * * Microprocessor compatible Digital input/output: TTL compatible Zero offset and full-scale error correction capability Ratiometric conversion capability Available in 16-pin DIP and Flat Package Compatible with MC 14443 and A9708 (DIP package) Single power supply: +4.75 V to +15 V Excellent Iinearity: 0.2% max. error Fast conversion time: 300 s/ch typ. Analog input volgage: 0 V to VCC - 2 V (5.25 V max.) Power Dissipation: 25 mW typ. at VCC = 5 V
s PACKAGES
16-pin Plastic DIP 16-pin Plastic SOP
(DIP-16P-M04)
(FPT-16P-M06)
MB4053
s PIN ASSIGNMENT
(Top view)
A1 A2 RAMP START CH GND RREF RAMP STOP VREF 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A0 I1 VCC I2 I3 I4 I5 I6
(DIP-16P-M04) (FPT-16P-M06)
2
MB4053
s PIN DESCRIPTION
Pin no. 9 to 13 15 16 1 2 3 Pin name Analog input Channel selection input RAMP START signal input RAMP STOP signal output Ramp capacitor pin Reference voltage supply pin Symbol I1 thru I6 A0 A1 A2 Function Analog inputs for the six channels. One of the 6 is selected by a specific bit pattern on A0 to A2. Input for selecting an analog input channel. Either GND, one of channels I1 to I6 or VREF is selected by a specific bit pattern on the 3 inputs.
RAMP START A/D conversion start signal input. RAMP START (1 0) Ramp time start signal input. RAMP START (0 1)
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RAMP STOP Indicates that CH is charged over comparator reference voltage VBE2. RAMP STOP (0 1) A/D conversion end signal (CH discharged to comparator reference voltage). RAMP STOP (0 1) CH Pin for externally connecting the ramp capacitor. The value of CH in conjunction with VREF and RREF establishes the ramp time. Reference voltage supply pin. This is the reference voltage source for determining the discharge current and the analog reference voltage for full-scale factor correction. When the channel selection input is set 111, this pin is selected for channel conversion. The full-scale factor is corrected using the conversion results. The voltage at this pin must be set to (GND + 2 V) to (VCC - 2 V) and 5.25 V or less. Pin for external reference resistance for setting the discharge current. The external resistance is connected between the power source pin (VCC) and the reference resistance pin (RREF). The discharge current is, then, IR = (VCC - VREF)/RREF. VCC GND Power supply pin Ground pin This pin is grounded. When the channel selection input is set to 000, this terminal is selected for channel conversion. The zero offset is corrected using the conversion results.
4
8
VREF
6
Reference resistance pin Power supply Ground
RREF
14 5
3
MB4053
s BLOCK DIAGRAM
VCC 14
RAMP START (FROM MPU) 3
SAMPLE/RAMP AMPLIFIER I1 15 I2 13 I3 12 ANALOG INPUT I4 11 I5 10 I6 9 VREF 8 + -
REFERENCE CURRENT GENERATOR
COMPARATOR + RAMP STOP (TO MPU)
VBE1
ANALOG MULTIPLEXER
7
IR
-
VBE2
DECODER
16
1
2
6 RREF
5 GND
4 CH
A0 A1 A2 (FROM MPU)
4
MB4053
s ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Digital input voltage Digital output voltage when off Analog input voltage Output current Storage temperature Ceramic Plastic Symbol VCC VIND VOH VINA IO Tstg Rating Min. -- -0.5 -0.5 -0.5 -- -55 -55 Max. 18 +30 +18 +30 10 +150 +125 Unit V V V V mA C C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Reference voltage* Ramp capacity Reference current Analog input voltage Output current Operating temperature * : 2 V VREF VCC - 2 V WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand. Symbol VCC VREF CH IR VIA IO Ta Value Min. 4.75 2.0 300 12 0 -- -40 Typ. 5.0 -- -- -- -- -- -- Max. 15 5.25 -- 50 VREF 1.6 +85 Unit V V pF A V mA C
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MB4053
s ELECTRICAL CHARACTERISTIC
(VCC = 4.75 V to 15 V, Ta = -40C to +85C) Parameter Conversion error Linearity error Analog input current Crosstalk between any two channels Multiplexer input offset voltage Conversion time Symbol EA ER IB VCR VOSM tC Value Min. -- -- -- 60 -- -- Typ. 0.2 0.08 -50 -- 2.0 296 Max. 0.3 0.2 -250 -- 4.0 350 Unit % % nA dB mV s/ch See "sMEASURMENT CIRCUIT" Analog input: 0 thru VREF CH = 3300 pF, IR = 50 A See "sMEASURMENT CIRCUIT" CH = 1000 pF*4
*3 *1 *2
Remarks
Acquisition time Acquisition current Ramp start delay time Multiplexer address time Digital high level input voltage Digital low level input voltage Digital low level input current Digital high level input current High level output current Low level output voltage Power supply current
tA IA tO tM VIH VIL IIL IIH IOH VOL ICC
-- 150 -- -- 2.0 -- -- -- -- -- --
20 -- 100 1 -- -- -5 -- -- -- 5
40 -- -- -- -- 0.8 -15 1 10 0.4 10
s A ns s V V A A A V mA
VIL = 0.4 V VIH = 5.5 V VOH = 15 V IOL = 1.6 mA
A minus sign (-) prefixing a current value indicates that the current flows from the IC to the external circuit. *1: Conversion error: For all channels, deviation from a straight line between two points obtained by channel addresses 000 (0 scale) and 111 (full scale). *2: Linearity error; Deviation from a straight line between the 0 and full scale points for each channel. *3: Crosstalk between channels: Voltage change VCH of CH terminal occurring when an input voltage of a channel is changed by V1 while another channel is already charged (RAMP START = 0). This calculated by 20log VCH V1 *4: Acquisition time: Sum of multiplexer delay time, RAMP START delay time, and time required to charge the selected input voltage to the ramp capacitor.
6
MB4053
CONVERSION ERROR tREF
LINEARITY ERROR
}
I1 to I6
tREF
Address "111" RAMP TIME RAMP TIME In
ER
EA
t0 Address "000" 0 INPUT VOLTAGE VREF
t0 0 INPUT VOLTAGE VREF
7
MB4053
s MEASURMENT CIRCUIT
4.75 V
A1
I1
VCC
I2
I3
I4
I5
I6
A1
A2
RAMP START
CH
GND
RREF
RAMP STOP
VREF 2.75 V
CH IR 4.75 V
20 k
4.75 V
Note: Adjust RREF in the range 40 to 200 k so that IR is 12 to 50 A.
s DIAGRAM
VIH A0 to A2 Input VIL tSL RAMP START Input tA CH Voltage tO VIN + VBE1 IR Slope = - CH VBE2 0V VOH RAMP STOP Output tR tC VOL VIH VIL
s CHANNEL SELECTION
Input address line A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 Selected analog input GND I1 I2 I3 I4 I5 I6 VREF
8
MB4053
s TYPICAL CHARACTERISTICS
PEAK LINEARITY ERROR vs AMBIENT TEMPERATURE Ta
0.18 VCC = 8 V VREF = 5 V IR = 12 A CH = 1000 pF
LINEARITY ERROR vs INPUT VOLTAGE
0.20 VCC = 8 V VREF = 5 V CH = 1000 pF Ta = 25C
Linearity Error [% of FSR]
0.16
IR = 12 A
Peak Linearity Error [% of FSR] 5
0.12 25 A 0.08 50 A 0.04
0.16
0.14
0.12 -50 0 50 100
0 0
1 2 3 Input Voltage VIA [V]
4
Ambient Temperature Ta [C]
SUPPLY CURRENT vs AMBIENT TEMPERATURE
8 Power Supply Current, ICC [mA] VCC = 8 V VREF = 5 V IR = 50 A 6
4
2
0 -50
0 50 Ambient Temperature Ta [C]
100
9
MB4053
s OPERATION DESCRIPTION
Refer to BLOCK DIAGRAM, and DIAGRAM. Address inputs A0 to A2 are used to select the analog input to be converted, (one of the six analog inputs I1 to I6). The RAMP START input is switched from a logic 1 to a logic zero. This causes the external ramp capacitor CH to charge at a fixed rate. (Note 1) until it reaches the sum of the selected analog input voltage and a constant offset voltage VBE1. The RAMP STOP output (open-collector switches from a logic 0 to logic 1 when the voltage on CH reaches the comparator reference voltage VBE2. The RAMP START input is switched back to a logic 1 after CH is completely charged. This disconnects the analog input from CH and allows it to be gin discharging at a fixed rate (Note 2). When the voltage on CH reaches the comparator reference voltage VBE2 the RAMP STOP output switches back to a logic 0. This completes a conversion cycle for 1 channel. The time between the RAMP START input switching (01) and RAMP STOP output switching (10) is the RAMP TIME tR. This would be directly proportional to the analog input voltage for the ideal situation where there was no comparator switching level error, leakage, switching delay times or effect of the impedance of the internal reference current source. tR can be calculated for the ideal case as follows:
tR = VIN x CH IR
Where: VIN = Analog input voltage to be measured CH = External ramp capacitor IR = VCC - VREF RREF
This ramp time is converted to a digital representation by counting tR with the microprocessor. If a small error can be tolerated, the A/D conversion software can be reduced and the conversion time minimized by omitting corrections. Notes:
1 Charge slope = IA - IR CH
150 A - IR CH
Where: IA is the acquisition current whose value is determined from the circuit constant in the IC. 2 Discharge slope = - IR CH
10
MB4053
s ZERO OFFSET AND FULL-SCALE FACTOR CORRECTIONS
High precision conversions can be achieved by correcting for zero offset and full scale factor as follows: The channel select address (A0 to A2) is set to 000. Ground (GND) is selected (internally) as the analog input and converted. This results in ramp time tR. Next the address is set to 111. VREF is selected (internally) and converted. This results in ramp time, tREF. Finally the desired analog input (one of I1 to I6) is selected and converted. This results in ramp time tX. This conversion sequence is arbitrary and the GND and VREF conversions are not needed each time a channel is converted but only as required for calibration. The relationships between the inputs and ramp times are shown below.
(VBE1)C = tZ (VREF + VBE1)C = tREF (VIN + VBE1)C = tX (VREF)C = tREF - tZ (VIN)C = tX - tZ (VIN)C = tX - tZ (VREF)C tREF - tZ
VCH
VREF + VBE1
VIN + VBE1
VBE1 VBE2 tR tZ tX tREF
The conversion error can then be minimized by using the above results in the expression below to calculate the corrected analog input voltage.
(VIN)C = (VREF)C x
tX - tZ tREF - tZ
Where: VIN = Analog input voltage to be measured VREF = Reference voltage VBE1 = Shift voltage in sample/ramp amplifer VBE2 = Threshold voltage of comparator VCH = CH voltage
The GND and VREF conversion sequence is arbitary, the GND and VREF conversions not being needed each time a channel (I1 to I6) is converted.
11
MB4053
s APPLICATION EXAMPLES
Examples of analog voltage (0 to 5 V) A/D conversion with 10-bit resolution are shown in "PEAK LINEARITY ERROR vs AMBIENT TEMPERATURE Ta" and "SUPPLY CURRENT vs AMBIENT TEMPERATURE".
VCC = 8 V 5V
RB VCC I1 I2 I3 To other Sensor Temperature Sensor RX R1 3 k I4 I5 I6 VREF GND R2 5 k MB4053
RAMP START RAMP STOP
20 k
A2 A1 A0 CH RREF RREF 120 k IR
Control input/output from MPU
CH = 5000 pF
Reference Voltage: VREF = Ramp Current: IR =
R2 R1 + R2
VCC ............ 7-1
R1 1 VCC ......... 7-2 R1 + R2 RREF RX Input Voltage: = VIN = VCC ................ 7-3 RX + RB Ramp Time: tR . . VIN CH = IR R2 RX = (1 + ) CH RREF ................. 7-4 R1 RX + RB 5 k VREF = x8V=5V 3 k + 5 k VCC - VREF 8V-5V = = 25 A RREF 120 k 5000 pF x (5 V + 0.7 V) CH x VREF tSL = = 228 s 150 A - 25 A IA(min) - IR . 5000 pF x 5 V = 1000 s CH x VREF tRmax = = . 25 A IR IR = If the ramp time is counted with a 1 MHz clock, the following resolution is obtained. 1000 s . = 1000 = 210 . 1 s
As shown in this example, the voltage output of the sensor is proportional to VCC (Eq. 7-3) and VREF is also proportional to VCC (Eq. 7-1), the sensor output conversion results (Eq. 7-4) are not influenced by power supply voltage fluctuation. Such a conversion is called ratio metric conversion and is effective for minimizing the effects of conversion error. Supply voltage fluctuations during discharge do result in error, however.
12
MB4053
s USAGE PRECAUTIONS
1. Shince the impedance of the ramp capacitor pin is approximately 30 M (high), a resistance must not be connected in paralleled with this input. A ramp capacitor with no leakage must be used. 2. At VIN = 0 V, tR has a finite value. 3. Since RAMP STOP is an open collector output, an external pull-up resistor is required. (For example, when a 20 k external pull-up resistor is used.) 4. All digital inputs/output are TTL compatible. 5. The time from RAMP START input switching (0 1) to RAMP STOP output switching (1 0) is ramp time tR. 6. tSL tA (max) = 7. tR . . = CH 150 A -1R x (VREF + 0.7 V)
CH x VIN, tR (max) . CH x VREF = . IR 1R VCC - VREF RREF
8. IR =
9. 2 V VREF (VCC - 2 V) and VREF 5.25 V 10.While and analog input voltage is being sampled, channel selection signals A0, A1, and A2 must not be changed for (tSL). 11.When IR is little, Linearity Error extends. However, Linearity Error is 0.2 [% of FSR] or less in IR (min) = 12 A.
13
MB4053
s ORDERING INFORMATION
Part number MB4053M MB4053PF Package 16-pin Plastic DIP (DIP-16P-M04) 16-pin Plastic SOP (FPT-16P-M06) Remarks
14
MB4053
s PACKAGE DIMENSIONS
16-pin Plastic DIP (DIP-16P-M04)
+0.20
19.55 -0.30 .770
+.008 -.012
INDEX-1 INDEX-2 6.200.25 (.244.010)
4.36(.172)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.460.08 (.018.003)
+0.30 +.012 -0 +0.30 +.012 -0
0.99 -0 .039 1.27(.050) MAX
1.52 -0
.060 2.54(.100) TYP
7.62(.300) TYP
15MAX
C
1994 FUJITSU LIMITED D16033S-2C-3
Dimensions in mm (inches)
(Continued)
15
MB4053
(Continued)
16-pin Plastic SOP (FPT-16P-M06)
2.25(.089)MAX 10.15 -0.20 .400 -.008
+0.25 +.010
0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012) "B"
7.800.40 (.307.016)
6.80 -0.20 +.016 .268 -.008
+0.40
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 +.002 .006 -.001 Details of "A" part 0.40(.016)
+0.05
0.500.20 (.020.008)
Details of "B" part 0.15(.006) 0.20(.008)
"A" 0.10(.004) 8.89(.350)REF
0.20(.008) 0.18(.007)MAX 0.68(.027)MAX 0.18(.007)MAX 0.68(.027)MAX
C
1994 FUJITSU LIMITED F16015S-2C-4
Dimensions in mm (inches) Dimensions in mm (inches)
16
MB4053
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803 (c) FUJITSU LIMITED Printed in Japan
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